663 search results - page 100 / 133 » Reducing Compilation Time Overhead in Compiled Simulators |
ACMMSP
2005
ACM
14 years 1 months ago
2005
ACM
ct In the past, program monitoring often operates at the code level, performing checks at function and loop boundaries. Recent research shows that profiling analysis can identify ...
LCPC
2004
Springer
14 years 1 months ago
2004
Springer
Previous work shows the possibility of predicting the cache miss rate (CMR) for all inputs of a program. However, most optimization techniques need to know more than the miss rate ...
IEEEPACT
2000
IEEE
14 years 15 days ago
2000
IEEE
As on-chip integration matures, single-chip system designers must not only be concerned with component-level issues such as performance and power, but also with onchip system-leve...
HPCA
1997
IEEE
14 years 9 days ago
1997
IEEE
This paper represents a design study of the datapath for a very long instruction word (VLIW) video signal processor (VSP). VLIW architectures provide high parallelism and excellen...
IPPS
1997
IEEE
14 years 9 days ago
1997
IEEE
We present the Data Parallel Fortran (DPF) benchmark suite, a set of data parallel Fortran codes forevaluatingdata parallel compilers appropriatefor any target parallel architectu...