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» Reducing Design Complexity of the Load Store Queue
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TON
2008
124views more  TON 2008»
13 years 8 months ago
Designing packet buffers for router linecards
-- Internet routers and Ethernet switches contain packet buffers to hold packets during times of congestion. Packet buffers are at the heart of every packet switch and router, whic...
Sundar Iyer, Ramana Rao Kompella, Nick McKeown
ICDE
2006
IEEE
198views Database» more  ICDE 2006»
14 years 9 months ago
Automating the Design and Construction of Query Forms
One of the simplest ways to query a database is through a form, where a user can fill in relevant information and obtain desired results by submitting the form. Designing good sta...
Magesh Jayapandian, H. V. Jagadish
ICCCN
2008
IEEE
14 years 2 months ago
Multi-Hop RFID Wake-Up Radio: Design, Evaluation and Energy Tradeoffs
Abstract—Energy efficiency is a central challenge in batteryoperated sensor networks. Current energy-efficient mechanisms employ either duty cycling, which reduces idle listeni...
Raja Jurdak, Antonio G. Ruzzelli, Gregory M. P. O'...
CIDR
2003
123views Algorithms» more  CIDR 2003»
13 years 9 months ago
A Case for Staged Database Systems
Traditional database system architectures face a rapidly evolving operating environment, where millions of users store and access terabytes of data. In order to cope with increasi...
Stavros Harizopoulos, Anastassia Ailamaki
CDES
2006
98views Hardware» more  CDES 2006»
13 years 9 months ago
Instruction Fetch Energy Reduction Using Forward-Branch Bufferable Innermost Loop Buffer
Recently, several loop buffer designs have been proposed to reduce instruction fetch energy due to size and location advantage of loop buffer. Nevertheless, on design complexity di...
Bin-Hua Tein, I-Wei Wu, Chung-Ping Chung