339 search results - page 45 / 68 » Reducing Memory Ordering Overheads in Software Transactional... |
HPCA
2009
IEEE
14 years 9 months ago
2009
IEEE
Software cache-based side channel attacks present serious threats to modern computer systems. Using caches as a side channel, these attacks are able to derive secret keys used in ...
POPL
2009
ACM
14 years 3 months ago
2009
ACM
Haskell has a rich set of synchronization primitives for implemented-state concurrency abstractions, ranging from the very high level (Software Transactional Memory) to the very l...
SC
2004
ACM
14 years 2 months ago
2004
ACM
Large datasets, on the order of GB and TB, are increasingly common as abundant computational resources allow practitioners to collect, produce and store data at higher rates. As d...
CGO
2005
IEEE
14 years 2 months ago
2005
IEEE
Software code caches are becoming ubiquitous, in dynamic optimizers, runtime tool platforms, dynamic translators, fast simulators and emulators, and dynamic compilers. Caching fre...
SPAA
2009
ACM
14 years 9 months ago
2009
ACM
Thread-level speculation (TLS) is a technique that allows parts of a sequential program to be executed in parallel. TLS ensures the parallel program's behaviour remains true ...