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» Reducing the complexity of the issue logic
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ICCD
2004
IEEE
87views Hardware» more  ICCD 2004»
14 years 4 months ago
Fetch Halting on Critical Load Misses
As the performance gap between processors and memory systems increases, the CPU spends more time stalled waiting for data from main memory. Critical long latency instructions, suc...
Nikil Mehta, Brian Singer, R. Iris Bahar, Michael ...
POPL
2011
ACM
12 years 10 months ago
Decidable logics combining heap structures and data
We define a new logic, STRAND, that allows reasoning with heapmanipulating programs using deductive verification and SMT solvers. STRAND logic (“STRucture ANd Data” logic) f...
P. Madhusudan, Gennaro Parlato, Xiaokang Qiu
ENTCS
2000
120views more  ENTCS 2000»
13 years 7 months ago
Efficient Substitution in Hoare Logic Expressions
Substitution plays an important role in Hoare Logic, as it is used in interpreting assignments. When writing a computer-based realization of Hoare Logic, it is therefore important...
Roberto Virga
CSL
2009
Springer
14 years 2 months ago
Model Checking FO(R) over One-Counter Processes and beyond
Abstract. One-counter processes are pushdown processes over a singleton stack alphabet (plus a stack-bottom symbol). We study the problems of model checking asynchronous products o...
Anthony Widjaja To
SIGMOD
2005
ACM
107views Database» more  SIGMOD 2005»
14 years 7 months ago
A notation and system for expressing and executing cleanly typed workflows on messy scientific data
The description, composition, and execution of even logically simple scientific workflows are often complicated by the need to deal with "messy" issues like heterogeneou...
Yong Zhao, James E. Dobson, Ian T. Foster, Luc Mor...