Sciweavers

723 search results - page 52 / 145
» Reducing the complexity of the issue logic
Sort
View
CJ
2006
84views more  CJ 2006»
13 years 7 months ago
Instruction Level Parallelism through Microthreading - A Scalable Approach to Chip Multiprocessors
Most microprocessor chips today use an out-of-order instruction execution mechanism. This mechanism allows superscalar processors to extract reasonably high levels of instruction ...
Kostas Bousias, Nabil Hasasneh, Chris R. Jesshope
ECML
2003
Springer
14 years 26 days ago
Robust k-DNF Learning via Inductive Belief Merging
A central issue in logical concept induction is the prospect of inconsistency. This problem may arise due to noise in the training data, or because the target concept does not fit...
Frédéric Koriche, Joël Quinquet...
IAT
2005
IEEE
14 years 1 months ago
An Approximate Pareto Optimal Cooperative Negotiation Model for Multiple
Cooperative negotiation is proved to be an effective paradigm to solve complex dynamic multi-objective problems in which each objective is associated to an agent. When the multi-o...
Nicola Gatti, Francesco Amigoni
CISST
2003
83views Hardware» more  CISST 2003»
13 years 9 months ago
Computational Efficiency of Structural Image Matching
This paper addresses computational efficiency issues of a new algebraic method for imagery registration/conflation. An algebraic approach to conflation/registration of images does ...
Richard Chase, Boris Kovalerchuk
ICCAD
2006
IEEE
130views Hardware» more  ICCAD 2006»
14 years 4 months ago
On bounding the delay of a critical path
Process variations cause different behavior of timingdependent effects across different chips. In this work, we analyze one example of timing-dependent effects, crosscoupling ...
Leonard Lee, Li-C. Wang