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» Reducing the complexity of the issue logic
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IPPS
1999
IEEE
13 years 11 months ago
Reducing I/O Complexity by Simulating Coarse Grained Parallel Algorithms
Block-wise access to data is a central theme in the design of efficient external memory (EM) algorithms. A second important issue, when more than one disk is present, is fully par...
Frank K. H. A. Dehne, David A. Hutchinson, Anil Ma...
CSL
2006
Springer
13 years 11 months ago
Verification of Ptime Reducibility for System F Terms Via Dual Light Affine Logic
In a previous work we introduced Dual Light Affine Logic (DLAL) ([BT04]) as a variant of Light Linear Logic suitable for guaranteeing complexity properties on lambda-calculus terms...
Vincent Atassi, Patrick Baillot, Kazushige Terui
MICRO
1997
IEEE
93views Hardware» more  MICRO 1997»
13 years 11 months ago
A Comparison of Data Prefetching on an Access Decoupled and Superscalar Machine
In this paper we investigate the behavior of data prefetching on an access decoupled machine and a superscalar machine. We assess if there are bene ts to using the decoupling para...
G. P. Jones, Nigel P. Topham
APAL
2006
64views more  APAL 2006»
13 years 7 months ago
What can be efficiently reduced to the Kolmogorov-random strings?
We investigate the question of whether one can characterize complexity classes (such as PSPACE or NEXP) in terms of efficient reducibility to the set of Kolmogorovrandom strings R...
Eric Allender, Harry Buhrman, Michal Koucký
ISCA
1997
IEEE
104views Hardware» more  ISCA 1997»
13 years 11 months ago
Complexity-Effective Superscalar Processors
The performance tradeoff between hardware complexity and clock speed is studied. First, a generic superscalar pipeline is defined. Then the specific areas of register renaming, ...
Subbarao Palacharla, Norman P. Jouppi, James E. Sm...