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» Reductions to Graph Isomorphism
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ICML
2004
IEEE
14 years 9 months ago
Solving cluster ensemble problems by bipartite graph partitioning
A critical problem in cluster ensemble research is how to combine multiple clusterings to yield a final superior clustering result. Leveraging advanced graph partitioning techniqu...
Xiaoli Zhang Fern, Carla E. Brodley
NETWORKS
2011
12 years 11 months ago
On terminal delta-wye reducibility of planar graphs
A graph is terminal ∆ − Y -reducible if, it can be reduced to a distinguished set of terminal vertices by a sequence of series-parallel reductions and ∆−Y -transformations...
Isidoro Gitler, Feliu Sagols
DASFAA
2008
IEEE
94views Database» more  DASFAA 2008»
13 years 10 months ago
Efficient Algorithms for Node Disjoint Subgraph Homeomorphism Determination
Recently, great efforts have been dedicated to researches on the management of large-scale graph-based data, where node disjoint subgraph homeomorphism relation between graphs has ...
Yanghua Xiao, Wentao Wu, Wei Wang 0009, Zhenying H...
ICCAD
2006
IEEE
108views Hardware» more  ICCAD 2006»
14 years 5 months ago
Soft error reduction in combinational logic using gate resizing and flipflop selection
Soft errors in logic are emerging as a significant reliability problem for VLSI designs. This paper presents novel circuit optimization techniques to mitigate soft error rates (SE...
Rajeev R. Rao, David Blaauw, Dennis Sylvester
FPGA
2010
ACM
209views FPGA» more  FPGA 2010»
14 years 5 months ago
FPGA power reduction by guarded evaluation
Guarded evaluation is a power reduction technique that involves identifying sub-circuits (within a larger circuit) whose inputs can be held constant (guarded) at specific times d...
Chirag Ravishankar, Jason Helge Anderson