17 search results - page 1 / 4 » Refereeing conflicts in hardware transactional memory |
ICS
2009
Tsinghua U.
13 years 8 months ago
2009
Tsinghua U.
In the search for high performance, most transactional memory (TM) systems execute atomic blocks concurrently and must thus be prepared for data conflicts. The TM system must then...
MICRO
2010
IEEE
13 years 8 months ago
2010
IEEE
Most Hardware Transactional Memory (HTM) implementations choose fixed version and conflict management policies at design time. While eager HTM systems store transactional state in-...
MICRO
2010
IEEE
13 years 5 months ago
2010
IEEE
Today's transactional memory systems implement the two-phase-locking (2PL) algorithm which aborts transactions every time a conflict happens. 2PL is a simple algorithm that pr...
PPOPP
2009
ACM
14 years 11 months ago
2009
ACM
This paper introduces a new way to provide strong atomicity in an implementation of transactional memory. Strong atomicity lets us offer clear semantics to programs, even if they ...
ISCA
2008
IEEE
13 years 10 months ago
2008
IEEE
Current hardware transactional memory systems seek to simplify parallel programming, but assume that large transactions are rare, so it is acceptable to penalize their performance...