Sciweavers

1017 search results - page 26 / 204
» Register computations on ordinals
Sort
View
PLDI
2006
ACM
14 years 1 months ago
A global progressive register allocator
This paper describes a global progressive register allocator, a register allocator that uses an expressive model of the register allocation problem to quickly find a good allocat...
David Ryan Koes, Seth Copen Goldstein
CGO
2005
IEEE
14 years 1 months ago
A Progressive Register Allocator for Irregular Architectures
Register allocation is one of the most important optimizations a compiler performs. Conventional graphcoloring based register allocators are fast and do well on regular, RISC-like...
David Koes, Seth Copen Goldstein
IPPS
2008
IEEE
14 years 2 months ago
Enhancing the effectiveness of utilizing an instruction register file
This paper describes the outcomes of the NSF Grant CNS-0615085: CSR-EHS: Enhancing the Effectiveness of Utilizing an Instruction Register File. We improved promoting instructions ...
David B. Whalley, Gary S. Tyson
IPPS
2007
IEEE
14 years 2 months ago
From Hardware to Software Synthesis of Linear Feedback Shift Registers
Linear Feedback Shift Registers (LFSRs) have always received considerable attention in computer science especially in coding theory and in cryptography. The scope of applications ...
Cédric Lauradoux
ASPDAC
2006
ACM
103views Hardware» more  ASPDAC 2006»
14 years 1 months ago
Low area pipelined circuits by multi-clock cycle paths and clock scheduling
— A new algorithm is proposed to reduce the number of intermediate registers of a pipelined circuit using a combination of multi-clock cycle paths and clock scheduling. The algor...
Bakhtiar Affendi Rosdi, Atsushi Takahashi