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PLDI
2005
ACM
14 years 3 months ago
Register allocation for software pipelined multi-dimensional loops
Software pipelining of a multi-dimensional loop is an important optimization that overlaps the execution of successive outermost loop iterations to explore instruction-level paral...
Hongbo Rong, Alban Douillet, Guang R. Gao
OOPSLA
2005
Springer
14 years 3 months ago
Adding trace matching with free variables to AspectJ
An aspect observes the execution of a base program; when certain actions occur, the aspect runs some extra code of its own. In the AspectJ language, the observations that an aspec...
Chris Allan, Pavel Avgustinov, Aske Simon Christen...
INFOCOM
2003
IEEE
14 years 3 months ago
Input Queued Switches: Cell Switching vs. Packet Switching
— Input Queued(IQ) switches have been very well studied in the recent past. The main problem in the IQ switches concerns scheduling. The main focus of the research has been the ï...
Yashar Ganjali, Abtin Keshavarzian, Devavrat Shah
FPGA
2008
ACM
174views FPGA» more  FPGA 2008»
13 years 11 months ago
Pattern-based behavior synthesis for FPGA resource reduction
Pattern-based synthesis has drawn wide interest from researchers who tried to utilize the regularity in applications for design optimizations. In this paper we present a general p...
Jason Cong, Wei Jiang
ECSCW
2003
13 years 11 months ago
When Can I Expect an Email Response? A Study of Rhythms in Email Usage
A study of email responsiveness was conducted to understand how the timing of email responses conveys important information. Interviews and observations explored users’ perceptio...
Joshua R. Tyler, John C. Tang