29 search results - page 4 / 6 » Regular layout generation of logically optimized datapaths |
VLSISP
2008
13 years 6 months ago
2008
In this paper we describe a regular expression pattern matching approach for reconfigurable hardware. Following a Non-deterministic Finite Automata direction, we introduce three ne...
ICASSP
2008
IEEE
14 years 1 months ago
2008
IEEE
Multiple memory banks design is employed in many high performance DSP processors. This architectural feature supports higher memory bandwidth by allowing multiple data memory acce...
ICLP
2009
Springer
14 years 7 months ago
2009
Springer
Abstract. A class of probabilistic-logic models is considered, which increases the expressibility from HMM's and SCFG's regular and contextfree languages to, in principle...
VLSID
2007
IEEE
14 years 7 months ago
2007
IEEE
In the past, Field Programmable Gate Array (FPGA) circuits only contained a limited amount of logic and operated at a low frequency. Few applications running on FPGAs consumed exc...
ICCAD
2007
IEEE
13 years 11 months ago
2007
IEEE
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...