1179 search results - page 119 / 236 » Relative Timing Based Verification of Timed Circuits and Sys... |
162
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FMCAD
2000
Springer
15 years 7 months ago
2000
Springer
Image computation nds wide application in VLSI CAD, such as state reachability analysis in formal veri cation and synthesis, combinational veri cation, combinational and sequential...
166
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SEMWEB
2010
Springer
15 years 2 months ago
2010
Springer
As knowledge bases move into the landscape of larger ontologies and have terabytes of related data, we must work on optimizing the performance of our tools. We are easily tempted t...
152
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EDBT
2006
ACM
16 years 4 months ago
2006
ACM
The aim of this paper is to demonstrate Hermes, a robust framework capable of aiding a spatio-temporal database developer in modeling, constructing and querying a database with dyn...
164
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APCSAC
2007
IEEE
15 years 8 months ago
2007
IEEE
Many years of CMOS technology scaling have resulted in increased power densities and higher core temperatures. Power and temperature concerns are now considered to be a primary cha...
155
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TCAD
2008
15 years 4 months ago
2008
The relatively poor scaling of interconnect in modern digital circuits necessitates a number of design optimizations, which must typically be iterated several times to meet the spe...