1179 search results - page 55 / 236 » Relative Timing Based Verification of Timed Circuits and Sys... |
131
Voted
ICASSP
2011
IEEE
14 years 7 months ago
2011
IEEE
The performance of a typical speaker verification system degrades significantly in reverberant environments. This degradation is partly due to the conventional feature extractio...
107
Voted
SIGSOFT
2005
ACM
16 years 4 months ago
2005
ACM
One of the challenges for software architects is ensuring that an implemented system faithfully represents its architecture. We describe and demonstrate a tool, called DiscoTect, ...
141
Voted
ATS
1998
IEEE
15 years 8 months ago
1998
IEEE
We propose a new static test set compaction method based on a careful examination of attributes of fault coverage curves. Our method is based on two key ideas: 1 fault-list and te...
137
Voted
DAC
2005
ACM
15 years 5 months ago
2005
ACM
A physical yet compact gate delay model is developed integrating short-channel effects and the Alpha-power law based timing model. This analytical approach accurately predicts bot...
125
Voted
ILP
2005
Springer
15 years 9 months ago
2005
Springer
Abstract. Reasoning plays a central role in intelligent systems that operate in complex situations that involve time constraints. In this paper, we present the Adaptive Logic Inter...