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SBACPAD
2008
IEEE
249views Hardware» more  SBACPAD 2008»
14 years 3 months ago
Processing Neocognitron of Face Recognition on High Performance Environment Based on GPU with CUDA Architecture
This work presents an implementation of Neocognitron Neural Network, using a high performance computing architecture based on GPU (Graphics Processing Unit). Neocognitron is an ar...
Gustavo Poli, José Hiroki Saito, Joã...
ICIP
2000
IEEE
14 years 10 months ago
Orthonormal Finite Ridgelet Transform for Image Compression
A finite implementation of the ridgelet transform is presented. The transform is invertible, non-redundant and achieved via fast algorithms. Furthermore we show that this transfor...
Minh N. Do, Martin Vetterli
ICIP
2006
IEEE
14 years 10 months ago
Computation Error Tolerance in Motion Estimation Algorithms
In this paper we study the computation error tolerance properties of motion estimation algorithms. We are motivated by two scenarios where hardware systems may introduce computati...
Hye-Yeon Cheong, In Suk Chong, Antonio Ortega
SAC
2008
ACM
13 years 8 months ago
An objective way to evaluate and compare binarization algorithms
The choice of the best binarization algorithm is very critical for any document image processing system, since it is one of the first tasks and any mistake it performs will be car...
Ergina Kavallieratou
ICIP
2009
IEEE
14 years 10 months ago
Memory-less Bit-plane Coder Architecture For Jpeg2000 With Concurrent Column-stripe Coding
In implementing an efficient block coder for JPEG2000, the memories required for storing the state variables dominate the hardware cost of a block coder. In this paper, we propose...