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DELTA
2006
IEEE
14 years 1 months ago
Minimizing Simultaneous Switching Noise (SSN) using Modified Odd/Even Bus Invert Method
In high speed digital circuits, the inductive effect is more dominant compared to capacitive effect. In particular, as the technology is shrinking, the spacing between interconnec...
K. S. Sainarayanan, J. V. R. Ravindra, M. B. Srini...
ASPDAC
2007
ACM
110views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Fast Placement Optimization of Power Supply Pads
Power grid networks in VLSI circuits are required to provide adequate input supply to ensure reliable performance. In this paper, we propose algorithms to find the placement of pow...
Yu Zhong, Martin D. F. Wong
DAC
2005
ACM
13 years 9 months ago
Partitioning-based approach to fast on-chip decap budgeting and minimization
This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today’s ...
Hang Li, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, ...
GLVLSI
2007
IEEE
134views VLSI» more  GLVLSI 2007»
14 years 1 months ago
Sleep transistor distribution in row-based MTCMOS designs
- The Multi-Threshold CMOS (MTCMOS) technology has become a popular technique for standby power reduction. This technology utilizes high-Vth sleep transistors to reduce subthreshol...
Chanseok Hwang, Peng Rong, Massoud Pedram
ISVLSI
2008
IEEE
104views VLSI» more  ISVLSI 2008»
14 years 1 months ago
Thermal-Aware Placement of Standard Cells and Gate Arrays: Studies and Observations
In high-performance VLSI circuits, the on-chip power densities are playing dominant role due to increased scaling of technology, increasing number of components, frequency and ban...
Prasun Ghosal, Tuhina Samanta, Hafizur Rahaman, Pa...