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SIGSOFT
2007
ACM
14 years 10 months ago
Quantitative verification: models techniques and tools
Automated verification is a technique for establishing if certain properties, usually expressed in temporal logic, hold for a system model. The model can be defined using a high-l...
Marta Z. Kwiatkowska
ECAI
2000
Springer
14 years 2 months ago
Autosteve: Automated Electrical Design Analysis
AutoSteve performs automated electrical design based on qualitative simulation and functional abstraction. It is the first commercial product capable of performing these tasks for ...
Chris Price
ISTA
2004
13 years 11 months ago
Evidential Paradigm and Intelligent Mathematical Text Processing
Abstract: This paper presents the evidential paradigm of computer-supported mathematical assistance in "doing" mathematics and in reasoning activity. At present, the evid...
Alexander V. Lyaletski, Anatoly E. Doroshenko, And...
POPL
2002
ACM
14 years 10 months ago
Mining specifications
Program verification is a promising approach to improving program quality, because it can search all possible program executions for specific errors. However, the need to formally...
Glenn Ammons, James R. Larus, Rastislav Bodí...
SIGSOFT
2003
ACM
14 years 10 months ago
Towards scalable compositional analysis by refactoring design models
Automated finite-state verification techniques have matured considerably in the past several years, but state-space explosion remains an obstacle to their use. Theoretical lower b...
Yung-Pin Cheng, Michal Young, Che-Ling Huang, Chia...