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» Representing Constraints with Automata
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DLT
2007
13 years 9 months ago
2-Visibly Pushdown Automata
Visibly Pushdown Automata (VPA) are a special case of pushdown machines where the stack operations are driven by the input. In this paper, we consider VPA with two stacks, namely 2...
Dario Carotenuto, Aniello Murano, Adriano Peron
ICDT
2010
ACM
259views Database» more  ICDT 2010»
14 years 5 months ago
Forward-XPath and extended register automata on data-trees
We consider a fragment of XPath named `forward-XPath', which contains all descendant and rightwards sibling axes as well as data equality and inequality tests. The satisfiabi...
Diego Figueira
CODES
2008
IEEE
13 years 9 months ago
Model checking SystemC designs using timed automata
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
Paula Herber, Joachim Fellmuth, Sabine Glesner
ACSD
2006
IEEE
129views Hardware» more  ACSD 2006»
14 years 1 months ago
Extended Timed Automata and Time Petri Nets
Timed Automata (TA) and Time Petri Nets (TPN) are two well-established formal models for real-time systems. Recently, a linear transformation of TA to TPNs preserving reachability...
Patricia Bouyer, Pierre-Alain Reynier, Serge Hadda...
ATVA
2006
Springer
131views Hardware» more  ATVA 2006»
13 years 11 months ago
Timed Unfoldings for Networks of Timed Automata
Whereas partial order methods have proved their efficiency for the analysis of discrete-event systems, their application to timed systems remains a challenging research topic. Here...
Patricia Bouyer, Serge Haddad, Pierre-Alain Reynie...