425 search results - page 64 / 85 » Requirements, specifications, and minimal refinement |
ISCA
2002
IEEE
14 years 17 days ago
2002
IEEE
This paper introduces the idea of using a User-Level Memory Thread (ULMT) for correlation prefetching. In this approach, a user thread runs on a general-purpose processor in main ...
ISORC
2002
IEEE
14 years 17 days ago
2002
IEEE
Preemption threshold scheduling (PTS) provides prominent benefits for fixed priority scheduling such as increased schedulability, reduced context switches, and decreased memory re...
EUROPAR
2009
Springer
13 years 11 months ago
2009
Springer
The Cell Broadband Engine (Cell BE) is a heterogeneous multi-core processor specifically designed to exploit thread-level parallelism. Its memory model comprehends a common shared ...
FGR
2006
IEEE
13 years 11 months ago
2006
IEEE
Non-linear subspaces derived using kernel methods have been found to be superior compared to linear subspaces in modeling or classification tasks of several visual phenomena. Such...
GCC
2006
Springer
13 years 11 months ago
2006
Springer
Interoperability between different Grid implementations is attracting more and more attention to seamlessly job execution. In this paper, one approach is proposed to implement the...