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CODES
2000
IEEE
14 years 2 days ago
Co-design of interleaved memory systems
Memory interleaving is a cost-efficient approach to increase bandwidth. Improving data access locality and reducing memory access conflicts are two important aspects to achieve hi...
Hua Lin, Wayne Wolf
ICC
2000
IEEE
111views Communications» more  ICC 2000»
14 years 2 days ago
Improving Bandwidth Utilization Based on Deterministic Delay Bound in Connection-Oriented Networks
Abstract—Packet scheduling disciplines play an important role in providing Quality of Service (QoS) guarantees to applications traffic in high speed networks. Several scheduling...
Peerapon Siripongwutikorn, Sujata Banerjee
SRDS
2000
IEEE
14 years 1 days ago
Deterministic Scheduling for Transactional Multithreaded Replicas
One way to implement a fault-tolerant a service is by replicating it at sites that fail independently. One of the replication techniques is active replication where each request i...
Ricardo Jiménez-Peris, Marta Patiño-...
CGO
2010
IEEE
14 years 1 hour ago
Efficient compilation of fine-grained SPMD-threaded programs for multicore CPUs
In this paper we describe techniques for compiling finegrained SPMD-threaded programs, expressed in programming models such as OpenCL or CUDA, to multicore execution platforms. Pr...
John A. Stratton, Vinod Grover, Jaydeep Marathe, B...
SIGCSE
1999
ACM
193views Education» more  SIGCSE 1999»
13 years 12 months ago
Cache conscious programming in undergraduate computer science
The wide-spread use of microprocessor based systems that utilize cache memory to alleviate excessively long DRAM access times introduces a new dimension in the quest to obtain goo...
Alvin R. Lebeck