Sciweavers

2778 search results - page 507 / 556
» Reuse Technique in Hardware Design
Sort
View
IPPS
2009
IEEE
14 years 3 months ago
A component-based framework for the Cell Broadband Engine
With the increasing trend of microprocessor manufacturers to rely on parallelism to increase their products’ performance, there is an associated increasing need for simple techn...
Timothy D. R. Hartley, Ümit V. Çataly&...
NOCS
2008
IEEE
14 years 2 months ago
Reducing the Interconnection Network Cost of Chip Multiprocessors
This paper introduces a cost-effective technique to deal with CMP coherence protocol requirements from the interconnection network point of view. A mechanism is presented to avoid...
Pablo Abad, Valentin Puente, José-Án...
DSN
2007
IEEE
14 years 2 months ago
Superscalar Processor Performance Enhancement through Reliable Dynamic Clock Frequency Tuning
Synchronous circuits are typically clocked considering worst case timing paths so that timing errors are avoided under all circumstances. In the case of a pipelined processor, thi...
Viswanathan Subramanian, Mikel Bezdek, Naga Durga ...
EUROMICRO
2007
IEEE
14 years 2 months ago
Partial Verification of Software Components: Heuristics for Environment Construction
Code model checking of software components suffers from the well-known problem of state explosion when applied to highly parallel components, despite the fact that a single compon...
Pavel Parizek, Frantisek Plasil
IAT
2007
IEEE
14 years 2 months ago
Agent-Based Network Intrusion Detection System
The paper presents security platform based on agents as an efficient and robust solution for high-performance intrusion detection system designed for deployment on highspeed netw...
Vojtech Krmicek, Pavel Celeda, Martin Rehák...