Sciweavers

61 search results - page 5 / 13
» Reuse and protection of intellectual property in the SpecC s...
Sort
View
FPL
2009
Springer
104views Hardware» more  FPL 2009»
14 years 2 months ago
A multi-layered XML schema and design tool for reusing and integrating FPGA IP
Reconfigurable computing systems remain difficult to use and program. One way to increase design productivity for these systems is through reuse of previously developed and veri...
Adam Arnesen, Nathan Rollins, Michael J. Wirthlin
MSE
2003
IEEE
92views Hardware» more  MSE 2003»
14 years 3 months ago
On simulating the IP Market Dynamics in an Academic Environment Using SystemC
As SoC (System-on-a-chip) methodology emerges, IP (Intellectual Property) development and integration will play a major role in the hightech industry. To prepare for this future t...
Ghaiyyur Quraishi, Ravi Shankar
ISQED
2005
IEEE
116views Hardware» more  ISQED 2005»
14 years 3 months ago
A Mask Reuse Methodology for Reducing System-on-a-Chip Cost
Today's System-on-a-Chip (SoC) design methodology provides an efficient way to develop highly integrated systems on a single chip by utilizing pre-designed intellectual prope...
Subhrajit Bhattacharya, John A. Darringer, Daniel ...
DATE
2002
IEEE
94views Hardware» more  DATE 2002»
14 years 2 months ago
E-Design Based on the Reuse Paradigm
This paper gives an overview on a Virtual electronic component or IP (Intellectual Property) exchange infrastructure whose main components are a XML "well structured IP e-cat...
L. Ghanmi, A. Ghrab, M. Hamdoun, B. Missaoui, K. S...
CODES
2000
IEEE
14 years 2 months ago
Parameterized system design
Continued growth in chip capacity has led to new methodologies stressing reuse, not only of pre-designed processing components, but even of entire pre-designed architectures. To b...
Tony Givargis, Frank Vahid