Most previous work on information flow in process algebras has been based on untimed models of concurrency. It is obvious, however, that an observer might well use time to gain i...
The Verisoft project aims at the pervasive formal verification of entire computer systems. In particular, the seamless verification of the academic system is attempted. This syst...
Mauro Gargano, Mark A. Hillebrand, Dirk Leinenbach...
Abstract. Synchronous models are useful for designing real-time embedded systems because they provide timing control and deterministic concurrency. However, the semantics of such m...
We present a process algebra suitable to the modelling of timed concurrent systems and to their efficient verification through model checking. The algebra is provided with two con...
In this paper we propose a high-level description of the behavior of digital systems. Behaviors are specified with a graphical synchronous model: “SyncCharts”. SyncCharts supp...