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» Robustness of Temporal Logic Specifications
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IMCSIT
2010
13 years 5 months ago
On the evaluation of the linguistic summarization of temporally focused time series using a measure of informativeness
We extend our previous works of deriving linguistic summaries of time series using a fuzzy logic approach to linguistic summarization. We proceed towards a multicriteria analysis o...
Anna Wilbik, Janusz Kacprzyk
KBSE
2005
IEEE
14 years 1 months ago
Properties and scopes in web model checking
We consider a formal framework for property verification of web applications using Spin model checker. Some of the web related properties concern all states of the model, while ot...
May Haydar, Sergiy Boroday, Alexandre Petrenko, Ho...
ECAI
2004
Springer
14 years 1 months ago
Analysis of Design Process Dynamics
To enable the development of automated support for the dynamics of design processes, a challenge is to model and analyse such dynamics in a formal manner. This paper contributes a ...
Tibor Bosse, Catholijn M. Jonker, Jan Treur
VLSID
2008
IEEE
122views VLSI» more  VLSID 2008»
14 years 8 months ago
A Module Checking Based Converter Synthesis Approach for SoCs
Protocol conversion involves the use of a converter to control communication between two or more protocols such that desired system-level specifications can be satisfied. We invest...
Roopak Sinha, Partha S. Roop, Samik Basu
FLAIRS
2000
13 years 9 months ago
The SH-Verification Tool
r Abstractions + Enduser Interface Analysis Kernel Tools for System Specification Enduser Interface Temporal Logic Homomorphism Editor Preamble Editor Hierarchy Editor APA EditorNe...
Peter Ochsenschläger, Jürgen Repp, Rolan...