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FCCM
2002
IEEE
127views VLSI» more  FCCM 2002»
14 years 12 days ago
Hardware-Assisted Fast Routing
To fully realize the benefits of partial and rapid reconfiguration of field-programmable devices, we often need to dynamically schedule computing tasks and generate instance-sp...
André DeHon, Randy Huang, John Wawrzynek
FCCM
2011
IEEE
220views VLSI» more  FCCM 2011»
12 years 11 months ago
Reducing the Energy Cost of Irregular Code Bases in Soft Processor Systems
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
Manish Arora, Jack Sampson, Nathan Goulding-Hotta,...
ICPP
2006
IEEE
14 years 1 months ago
Parallel Algorithms for Evaluating Centrality Indices in Real-world Networks
This paper discusses fast parallel algorithms for evaluating several centrality indices frequently used in complex network analysis. These algorithms have been optimized to exploi...
David A. Bader, Kamesh Madduri
EDBTW
2006
Springer
13 years 11 months ago
Efficiently Processing XML Queries over Fragmented Repositories with PartiX
The data volume of XML repositories and the response time of query processing have become critical issues for many applications, especially for those in the Web. An interesting alt...
Alexandre Andrade, Gabriela Ruberg, Fernanda Arauj...
IPPS
2005
IEEE
14 years 1 months ago
Improvement of Power-Performance Efficiency for High-End Computing
Left unchecked, the fundamental drive to increase peak performance using tens of thousands of power hungry components will lead to intolerable operating costs and failure rates. R...
Rong Ge, Xizhou Feng, Kirk W. Cameron