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CC
2008
Springer
240views System Software» more  CC 2008»
13 years 11 months ago
Hardware JIT Compilation for Off-the-Shelf Dynamically Reconfigurable FPGAs
JIT compilation is a model of execution which translates at run time critical parts of the program to a low level representation. Typically a JIT compiler produces machine code fro...
Etienne Bergeron, Marc Feeley, Jean-Pierre David
FPGA
1997
ACM
118views FPGA» more  FPGA 1997»
14 years 1 months ago
Improving Functional Density Through Run-Time Constant Propagation
Circuit specialization techniques such as constant propagation are commonly used to reduce both the hardware resources and cycle time of digital circuits. When recon gurable FPGAs...
Michael J. Wirthlin, Brad L. Hutchings
CASCON
2004
127views Education» more  CASCON 2004»
13 years 11 months ago
A quantitative analysis of the performance impact of specialized bytecodes in java
Java is implemented by 201 bytecodes that serve the same purpose as assembler instructions while providing object-file platform independence. A collection of core bytecodes provid...
Ben Stephenson, Wade Holst
IRREGULAR
1995
Springer
14 years 1 months ago
Run-Time Parallelization of Irregular DOACROSS Loops
Dependencies between iterations of loop structures cannot always be determined at compile-time because they may depend on input data which is known only at run-time. A prime examp...
V. Prasad Krothapalli, Thulasiraman Jeyaraman, Mar...
GPCE
2005
Springer
14 years 3 months ago
Optimizing Marshalling by Run-Time Program Generation
Saving the internal data of an application in an external form is called marshalling. A generic marshaller is difficult to optimize because the format of the data that will be mars...
Baris Aktemur, Joel Jones, Samuel N. Kamin, Lars C...