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ISCA
1995
IEEE
98views Hardware» more  ISCA 1995»
13 years 11 months ago
Instruction Fetching: Coping with Code Bloat
Previous research has shown that the SPEC benchmarks achieve low miss ratios in relatively small instruction caches. This paper presents evidence that current software-development...
Richard Uhlig, David Nagle, Trevor N. Mudge, Stuar...
ASPLOS
2012
ACM
12 years 3 months ago
Clearing the clouds: a study of emerging scale-out workloads on modern hardware
Emerging scale-out workloads require extensive amounts of computational resources. However, data centers using modern server hardware face physical constraints in space and power,...
Michael Ferdman, Almutaz Adileh, Yusuf Onur Ko&cce...
HPCC
2007
Springer
14 years 1 months ago
Strategies and Implementation for Translating OpenMP Code for Clusters
OpenMP is a portable shared memory programming interface that promises high programmer productivity for multithreaded applications. It is designed for small and middle sized shared...
Deepak Eachempati, Lei Huang, Barbara M. Chapman
ASPDAC
2008
ACM
97views Hardware» more  ASPDAC 2008»
13 years 9 months ago
A Compiler-in-the-Loop framework to explore Horizontally Partitioned Cache architectures
Horizontally Partitioned Caches (HPCs) are a promising architectural feature to reduce the energy consumption of the memory subsystem. However, the energy reduction obtained using...
Aviral Shrivastava, Ilya Issenin, Nikil Dutt
ASPLOS
2012
ACM
12 years 3 months ago
Reflex: using low-power processors in smartphones without knowing them
To accomplish frequent, simple tasks with high efficiency, it is necessary to leverage low-power, microcontroller-like processors that are increasingly available on mobile systems...
Felix Xiaozhu Lin, Zhen Wang, Robert LiKamWa, Lin ...