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ICIP
2006
IEEE
14 years 9 months ago
An FPGA-Based Implementation of Spatio-Temporal Object Segmentation
This paper proposes a robust real-time, scalable and modular Field Programmable Gate Array (FPGA) based implementation of a spatiotemporal segmentation of video objects. The goal ...
Kumara Ratnayake, Aishy Amer
IPPS
2010
IEEE
13 years 5 months ago
Scalable multi-pipeline architecture for high performance multi-pattern string matching
Multi-pattern string matching remains a major performance bottleneck in network intrusion detection and anti-virus systems for high-speed deep packet inspection (DPI). Although Aho...
Weirong Jiang, Yi-Hua Edward Yang, Viktor K. Prasa...
TIP
2010
119views more  TIP 2010»
13 years 2 months ago
Software Designs of Image Processing Tasks With Incremental Refinement of Computation
Software realizations of computationally-demanding image processing tasks (e.g. image transforms and convolution) do not currently provide graceful degradation when their clock-cy...
Davide Anastasia, Yiannis Andreopoulos
ADT
2011
12 years 11 months ago
Virtual networks: isolation, performance, and trends
Currently, there is a strong effort of the research community in rethinking the Internet architecture to cope with its current limitations and support new requirements. Many resea...
Natalia Castro Fernandes, Marcelo D. D. Moreira, I...
FCCM
2003
IEEE
185views VLSI» more  FCCM 2003»
14 years 20 days ago
Implementation of a Content-Scanning Module for an Internet Firewall
A module has been implemented in Field Programmable Gate Array (FPGA) hardware that scans the content of Internet packets at Gigabit/second rates. All of the packet processing ope...
James Moscola, John W. Lockwood, Ronald Prescott L...