1642 search results - page 282 / 329 » SPINning Parallel Systems Software |
COMPCON
1994
IEEE
14 years 1 months ago
1994
IEEE
: Today, online transaction processing applications can downsize from mainframes to microprocessors. Commodity database systems, operating systems, and hardware came of age in 1993...
MICRO
2010
IEEE
13 years 7 months ago
2010
IEEE
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
IISWC
2008
IEEE
14 years 3 months ago
2008
IEEE
Abstract—Transactional Memory (TM) is emerging as a promising technology to simplify parallel programming. While several TM systems have been proposed in the research literature,...
TOMACS
1998
13 years 8 months ago
1998
architectures at multiple levels of abstraction, encompassing both hardware and software. It has five modes of operation (Design, Model Validation, Build Simulation, Simulate Syste...
ICS
2005
Tsinghua U.
14 years 2 months ago
2005
Tsinghua U.
Excessive power consumption is becoming a major barrier to extracting the maximum performance from high-performance parallel systems. Therefore, techniques oriented towards reduci...