1642 search results - page 85 / 329 » SPINning Parallel Systems Software |
ICPP
1995
IEEE
13 years 11 months ago
1995
IEEE
Software barriers have been designed and evaluated for barrier synchronization in large-scale shared-memory multiprocessors, under the assumption that all processorsreach the sync...
MICRO
2012
IEEE
11 years 10 months ago
2012
IEEE
The past 10 years have delivered two significant revolutions. (1) Microprocessor design has been transformed by the limits of chip power, wire latency, and Dennard scaling—leadi...
EDO
2000
Springer
13 years 11 months ago
2000
Springer
Abstract. This paper presents a framework that lets a component developer provide a component user with different kinds of information, depending on the specific context and needs....
ICPP
2008
IEEE
14 years 2 months ago
2008
IEEE
—We address the recently recognized privatization problem in software transactional memory (STM) runtimes, and introduce the notion of partially visible reads (PVRs) to heuristic...
ICS
1999
Tsinghua U.
14 years 4 days ago
1999
Tsinghua U.
As the gap between memory and processor speeds continues to widen, cache efficiency is an increasingly important component of processor performance. Compiler techniques have been...