Software pipelining is a critical optimization for producing efficient code for VLIW/EPIC and superscalar processors in highperformance embedded applications such as digital sign...
— Software simulation remains the most used method for VHDL RTL functional verification. The functional verification process essentially consists of two parts. The first one is t...
Youssef Serrestou, Vincent Beroulle, Chantal Robac...
This paper describes the formalisation of Java thread synchronisation in an extended Owicki-Gries theory, which facilitates the proof of safety and progress properties of multi-th...
We present in this paper a rigorous and automated based approach for the behavioral validation of control software systems. This approach relies on metamodeling, model-transformati...
Alban Rasse, Jean-Marc Perronne, Pierre-Alain Mull...
FCA has been successfully applied to software engineering tasks such as source code analysis and class hierarchy re-organization. Most notably, FCA hematics behind the mechanism of...
Michel Dao, Marianne Huchard, Mohamed Rouane Hacen...