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ISCAS
2007
IEEE
144views Hardware» more  ISCAS 2007»
14 years 3 months ago
Power/Area Trade-Offs in Low-Power/Low-Area Unary-R-2R CMOS Digital-to-Analog Converters
Abstract— Performance trade offs of unary-R-2R and unarybinary digital-to-analog converters are presented. It is shown that for a given resolution and sampling rate, the active a...
Babak Nejati, Larry Larson
CIT
2007
Springer
14 years 3 months ago
A Fast Edge Detection Algorithm for Road Boundary Extraction under Non-uniform Light Condition
In this paper a fast edge detection algorithm based on a simple logic has been implemented for road boundary detection in non-uniform light condition. Road images taken in the cam...
Aurobinda Routray, Kanungo Barada Mohanty
GLVLSI
2003
IEEE
239views VLSI» more  GLVLSI 2003»
14 years 2 months ago
CMOS flash analog-to-digital converter for high speed and low voltage applications
A CMOS flash analog-to-digital converter (ADC) designed for high speed and low voltage is presented. Using the Threshold Inverter Quantization (TIQ) comparator technique, a flas...
Jincheol Yoo, Kyusun Choi, Jahan Ghaznavi
SIGMETRICS
2010
ACM
206views Hardware» more  SIGMETRICS 2010»
14 years 2 months ago
Successive c-optimal designs: a scalable technique to optimize the measurements on large networks
We propose a new approach to optimize the deployment and the sampling rates of network monitoring tools, such as Netflow, on a large IP network. It reduces to solving a stochasti...
Guillaume Sagnol, Mustapha Bouhtou, Stephane Gaube...
GLVLSI
2000
IEEE
90views VLSI» more  GLVLSI 2000»
14 years 1 months ago
Low power high speed analog-to-digital converter for wireless communications
A new ADC architecture is devised. This architecture is memory based, in which the last sample is used to predict the current one, resulting in both power dissipation and energy r...
A. E. Hussein, Mohamed I. Elmasry