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VLSID
2007
IEEE
133views VLSI» more  VLSID 2007»
14 years 8 months ago
On the Impact of Address Space Assignment on Performance in Systems-on-Chip
Today, VLSI systems for computationally demanding applications are being built as Systems-on-Chip (SoCs) with a distributed memory sub-system which is shared by a large number of ...
G. Hazari, Madhav P. Desai, H. Kasture
ICPPW
2009
IEEE
13 years 5 months ago
A Scalable Parallel Approach for Peptide Identification from Large-Scale Mass Spectrometry Data
Identifying peptides, which are short polymeric chains of amino acid residues in a protein sequence, is of fundamental importance in systems biology research. The most popular appr...
Gaurav Ramesh Kulkarni, Ananth Kalyanaraman, Willi...
IPPS
2007
IEEE
14 years 1 months ago
MultiEdge: An Edge-based Communication Subsystem for Scalable Commodity Servers
At the core of contemporary high performance computer systems is the communication infrastructure. For this reason, there has been a lot of work on providing low-latency, high-ban...
Sven Karlsson, Stavros Passas, George Kotsis, Ange...
IPPS
2008
IEEE
14 years 1 months ago
Parallel IP lookup using multiple SRAM-based pipelines
Pipelined SRAM-based algorithmic solutions have become competitive alternatives to TCAMs (ternary content addressable memories) for high throughput IP lookup. Multiple pipelines c...
Weirong Jiang, Viktor K. Prasanna
SPAA
2009
ACM
14 years 8 months ago
Inherent limitations on disjoint-access parallel implementations of transactional memory
Transactional memory (TM) is a promising approach for designing concurrent data structures, and it is essential to develop better understanding of the formal properties that can b...
Hagit Attiya, Eshcar Hillel, Alessia Milani