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IPPS
2010
IEEE
13 years 6 months ago
Structuring the execution of OpenMP applications for multicore architectures
Abstract--The now commonplace multi-core chips have introduced, by design, a deep hierarchy of memory and cache banks within parallel computers as a tradeoff between the user frien...
François Broquedis, Olivier Aumage, Brice G...
ISPAN
2005
IEEE
14 years 2 months ago
The structure of super line graphs
For a given graph G = (V, E) and a positive integer k, the super line graph of index k of G is the graph Sk(G) which has for vertices all the k-subsets of E(G), and two vertices S...
Jay Bagga, Daniela Ferrero
CCGRID
2010
IEEE
13 years 9 months ago
Dynamic Resource Pricing on Federated Clouds
Current large distributed systems allow users to share and trade resources. In cloud computing, users purchase different types of resources from one or more resource providers usi...
Marian Mihailescu, Yong Meng Teo
IEEEPACT
2006
IEEE
14 years 2 months ago
Testing implementations of transactional memory
Transactional memory is an attractive design concept for scalable multiprocessors because it offers efficient lock-free synchronization and greatly simplifies parallel software....
Chaiyasit Manovit, Sudheendra Hangal, Hassan Chafi...
PPAM
2005
Springer
14 years 2 months ago
A New Diagonal Blocking Format and Model of Cache Behavior for Sparse Matrices
Algorithms for the sparse matrix-vector multiplication (shortly SpM×V ) are important building blocks in solvers of sparse systems of linear equations. Due to matrix sparsity, the...
Pavel Tvrdík, Ivan Simecek