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MICRO
2010
IEEE
173views Hardware» more  MICRO 2010»
13 years 5 months ago
Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?
To extend the exponential performance scaling of future chip multiprocessors, improving energy efficiency has become a first-class priority. Single-chip heterogeneous computing ha...
Eric S. Chung, Peter A. Milder, James C. Hoe, Ken ...
WMPI
2004
ACM
14 years 27 days ago
Memory coherence activity prediction in commercial workloads
Abstract. Recent research indicates that prediction-based coherence optimizations offer substantial performance improvements for scientific applications in distributed shared memor...
Stephen Somogyi, Thomas F. Wenisch, Nikolaos Harda...
ISCA
1994
IEEE
129views Hardware» more  ISCA 1994»
13 years 11 months ago
Software Versus Hardware Shared-Memory Implementation: A Case Study
We comparethe performance of software-supported shared memory on a general-purpose network to hardware-supported shared memory on a dedicated interconnect. Up to eight processors,...
Alan L. Cox, Sandhya Dwarkadas, Peter J. Keleher, ...
ISCA
2009
IEEE
178views Hardware» more  ISCA 2009»
14 years 2 months ago
Thread motion: fine-grained power management for multi-core systems
Dynamic voltage and frequency scaling (DVFS) is a commonly-used powermanagement scheme that dynamically adjusts power and performance to the time-varying needs of running programs...
Krishna K. Rangan, Gu-Yeon Wei, David Brooks
SIGGRAPH
2000
ACM
13 years 12 months ago
Pomegranate: a fully scalable graphics architecture
Pomegranate is a parallel hardware architecture for polygon rendering that provides scalable input bandwidth, triangle rate, pixel rate, texture memory and display bandwidth while...
Matthew Eldridge, Homan Igehy, Pat Hanrahan