Sciweavers

860 search results - page 59 / 172
» Scaling Up Software Architecture Evaluation Processes
Sort
View
FPGA
2000
ACM
175views FPGA» more  FPGA 2000»
13 years 11 months ago
An FPGA implementation and performance evaluation of the Serpent block cipher
With the expiration of the Data Encryption Standard (DES) in 1998, the Advanced Encryption Standard (AES) development process is well underway. It is hoped that the result of the ...
Adam J. Elbirt, Christof Paar
IEEESCC
2010
IEEE
13 years 5 months ago
BPEL Remote Objects: Integrating BPEL Processes into Object-Oriented Applications
Service-orientation and object-oriented design are common practice in the field of business application development. Business process execution languages help to facilitate the orc...
Marvin Ferber, Thomas Rauber, Sascha Hunold
ERSA
2008
103views Hardware» more  ERSA 2008»
13 years 9 months ago
A Hardware Accelerator for k-th Nearest Neighbor Thinning
This paper presents an accelerator for k-th nearest neighbor thinning, a run time intensive algorithmic kernel used in recent multi-objective optimizers. We discuss the thinning al...
Tobias Schumacher, Robert Meiche, Paul Kaufmann, E...
SC
2003
ACM
14 years 1 months ago
MRNet: A Software-Based Multicast/Reduction Network for Scalable Tools
We present MRNet, a software-based multicast/reduction network for building scalable performance and system administration tools. MRNet supports multiple simultaneous, asynchronou...
Philip C. Roth, Dorian C. Arnold, Barton P. Miller
SIGCOMM
2010
ACM
13 years 8 months ago
PacketShader: a GPU-accelerated software router
We present PacketShader, a high-performance software router framework for general packet processing with Graphics Processing Unit (GPU) acceleration. PacketShader exploits the mas...
Sangjin Han, Keon Jang, KyoungSoo Park, Sue B. Moo...