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DDECS
2006
IEEE
108views Hardware» more  DDECS 2006»
14 years 3 months ago
Impact of Shared Instruction Memory on Performance of FPGA-based MP-SoC Video Encoder
—The impact of shared instruction memory on performance is measured and analyzed for an FPGAbased Multiprocessor System-on-Chip (MP-SoC) with an MPEG-4 video encoding application...
Ari Kulmala, Erno Salminen, Olli Lehtoranta, Timo ...
ASPDAC
2006
ACM
117views Hardware» more  ASPDAC 2006»
14 years 3 months ago
SAT-based optimal hypergraph partitioning with replication
We propose a methodology for optimal k-way partitioning with replication of directed hypergraphs via Boolean satisfiability. We begin by leveraging the power of existing and emerg...
Michael G. Wrighton, André DeHon
CAP
2010
13 years 4 months ago
Polynomial homotopies on multicore workstations
Homotopy continuation methods to solve polynomial systems scale very well on parallel machines. In this paper we examine its parallel implementation on multiprocessor multicore wo...
Jan Verschelde, Genady Yoffe
COGSR
2011
99views more  COGSR 2011»
13 years 4 months ago
A biologically realistic cleanup memory: Autoassociation in spiking neurons
Methods for cleaning up (or recognizing) states of a neural network are crucial for the functioning of many neural cognitive models. For example, Vector Symbolic Architectures pro...
Terrence C. Stewart, Yichuan Tang, Chris Eliasmith
SNPD
2008
13 years 10 months ago
Architecture-aware Partial Order Reduction to Accelerate Model Checking of Networked Programs
Testing cannot cover all execution schedules in concurrent software. Model checking, however, is capable of verifying the outcome of all possible executions. It has been applied s...
Cyrille Artho, Watcharin Leungwattanakit, Masami H...