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CF
2007
ACM
13 years 11 months ago
Massively parallel processing on a chip
MppSoC is a SIMD architecture composed of a grid of processors and memories connected by a X-Net neighbourhood network and a general purpose global router. MppSoC is an evolution ...
Philippe Marquet, Simon Duquennoy, Sébastie...
CF
2008
ACM
13 years 9 months ago
Multi-terabit ip lookup using parallel bidirectional pipelines
To meet growing terabit link rates, highly parallel and scalable architectures are needed for IP lookup engines in next generation routers. This paper proposes an SRAM-based multi...
Weirong Jiang, Viktor K. Prasanna
TPDS
2002
117views more  TPDS 2002»
13 years 7 months ago
Gemini: An Optical Interconnection Network for Parallel Processing
Abstract--The Gemini interconnect is a dual technology (optical and electrical) interconnection network designed for use in tightlycoupled multicomputer systems. It consists of a c...
Roger D. Chamberlain, Mark A. Franklin, Ch'ng Shi ...
IASTEDSE
2004
13 years 9 months ago
A coordination architecture for time-dependent components
The integration of distributed, data dependent components requires a data synchronisation model. We consider a class of systems where data-dependent components produce data in dis...
Michael N. Barth, Alexander Knapp
ICPP
1995
IEEE
13 years 11 months ago
Hiding Miss Latencies with Multithreading on the Data Diffusion Machine
— Large parallel computers require techniques to tolerate the potentially large latencies of accessing remote data. Multithreadingis onesuch technique. We extend previous studies...
Henk L. Muller, Paul W. A. Stallard, David H. D. W...