1263 search results - page 49 / 253 » Scatter-Add in Data Parallel Architectures |
ISCA
1994
IEEE
14 years 2 months ago
1994
IEEE
Multithreaded architectures context switch between instruction streams to hide memory access latency. Although this improves processor utilization, it can increase cache interfere...
HPCA
1997
IEEE
14 years 2 months ago
1997
IEEE
Many parallel systems offer a simple view of memory: all storage cells are addresseduniformly. Despite a uniform view of the memory, the machines differsignificantly in theirmemo...
EUROPAR
2007
Springer
14 years 2 months ago
2007
Springer
Due to the increasing performance requirements of decoding H.264/AVC in HDTV or larger resolutions, new approaches are necessary to enable real-time processing. According to the cu...
WSC
1998
13 years 11 months ago
1998
We have taken a NIST molecular dynamics simulation program (md3), which was configured as a single sequential process running on a CRAY C90 vector supercomputer, and parallelized ...
JSA
2007
13 years 10 months ago
2007
Multiprocessor system-on-chip (MP-SoC) platforms represent an emerging trend for embedded multimedia applications. To enable MP-SoC platforms, scalable communication-centric inter...