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ISCAPDCS
2003
13 years 11 months ago
Dynamic Simultaneous Multithreaded Architecture
This paper presents the Dynamic Simultaneous Multithreaded Architecture (DSMT). DSMT efficiently executes multiple threads from a single program on a SMT processor core. To accomp...
Daniel Ortiz Arroyo, Ben Lee
USS
2010
13 years 8 months ago
Adapting Software Fault Isolation to Contemporary CPU Architectures
Software Fault Isolation (SFI) is an effective approach to sandboxing binary code of questionable provenance, an interesting use case for native plugins in a Web browser. We prese...
David Sehr, Robert Muth, Cliff Biffle, Victor Khim...
ERSA
2006
133views Hardware» more  ERSA 2006»
13 years 11 months ago
An FPGA based Co-Design Architecture for MIMO Lattice Decoders
MIMO systems have attracted great attentions because of their huge capacity. The hardware implementation of MIMO decoder becomes a challenging task as the complexity of the MIMO sy...
Cao Liang, Jing Ma, Xin-Ming Huang
CCS
2011
ACM
12 years 10 months ago
MIDeA: a multi-parallel intrusion detection architecture
Network intrusion detection systems are faced with the challenge of identifying diverse attacks, in extremely high speed networks. For this reason, they must operate at multi-Giga...
Giorgos Vasiliadis, Michalis Polychronakis, Sotiri...
WMPI
2004
ACM
14 years 3 months ago
Scalable cache memory design for large-scale SMT architectures
The cache hierarchy design in existing SMT and superscalar processors is optimized for latency, but not for bandwidth. The size of the L1 data cache did not scale over the past dec...
Muhamed F. Mudawar