1263 search results - page 89 / 253 » Scatter-Add in Data Parallel Architectures |
HICSS
1994
IEEE
14 years 1 months ago
1994
IEEE
The appearance of 64-bit processors allows a new approach to microkernel desagn From our experience with a message passang microkernel MESHIX, we discovered that a multi-address s...
ICDCS
1994
IEEE
14 years 1 months ago
1994
IEEE
In a multidatabase environment with mobile computers involved, the nature of computing is such that the user may not wait for the submitted global transaction to complete before d...
PPOPP
1993
ACM
14 years 1 months ago
1993
ACM
This paper discusses some of the issues involved in implementing a shared-address space programming model on large-scale, distributed-memory multiprocessors. While such a programm...
SBACPAD
2007
IEEE
14 years 3 months ago
2007
IEEE
One way to exploit Thread Level Parallelism (TLP) is to use architectures that implement novel multithreaded execution models, like Scheduled DataFlow (SDF). This latter model pro...
IPPS
2007
IEEE
14 years 4 months ago
2007
IEEE
Emerging heterogeneous multiprocessors will have custom memory and bus architectures that must balance resource sharing and system partitioning to meet cost constraints. We propos...