Sciweavers

3563 search results - page 666 / 713
» Scheduling Algorithms for Procrastinators
Sort
View
ASPDAC
2005
ACM
81views Hardware» more  ASPDAC 2005»
13 years 9 months ago
Design and design automation of rectification logic for engineering change
In a later stage of a VLSI design, it is quite often to modify a design implementation to accommodate the new specification, design errors, or to meet design constraints. In addit...
Cheng-Hung Lin, Yung-Chang Huang, Shih-Chieh Chang...
DAC
2005
ACM
13 years 9 months ago
Unified high-level synthesis and module placement for defect-tolerant microfluidic biochips
Microfluidic biochips promise to revolutionize biosensing and clinical diagnostics. As more bioassays are executed concurrently on a biochip, system integration and design complex...
Fei Su, Krishnendu Chakrabarty
PADL
2010
Springer
13 years 9 months ago
A Simple and Efficient Implementation of Concurrent Local Tabling
Newer Prolog implementations commonly offer support for multi-threading, and have also begun to offer support for tabling. However, most implementations do not yet integrate tablin...
Rui Marques, Terrance Swift, José C. Cunha
EMSOFT
2008
Springer
13 years 9 months ago
Energy efficient streaming applications with guaranteed throughput on MPSoCs
In this paper we present a design space exploration flow to achieve energy efficiency for streaming applications on MPSoCs while meeting the specified throughput constraints. The ...
Jun Zhu, Ingo Sander, Axel Jantsch
FSE
2008
Springer
103views Cryptology» more  FSE 2008»
13 years 9 months ago
New Form of Permutation Bias and Secret Key Leakage in Keystream Bytes of RC4
Consider the permutation S in RC4. Roos pointed out in 1995 that after the Key Scheduling Algorithm (KSA) of RC4, each of the initial bytes of the permutation, i.e., S[y] for smal...
Subhamoy Maitra, Goutam Paul