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ESAS
2004
Springer
14 years 1 months ago
Secure AES Hardware Module for Resource Constrained Devices
Abstract. Low power consumption, low gate count, and high throughput are standard design criteria for cryptographic coprocessors designated for resource constrained devices such as...
Elena Trichina, Tymur Korkishko
AICCSA
2005
IEEE
91views Hardware» more  AICCSA 2005»
14 years 1 months ago
Secure transmission of sensitive data using multiple channels
A new scheme for transmitting sensitive data is proposed, the proposed scheme depends on partitioning the output of a block encryption module using the Chinese Remainder Theorem a...
Abdelhamid S. Abdelhamid, Ahmed A. Belal
FOSAD
2004
Springer
14 years 1 months ago
A Tutorial on Physical Security and Side-Channel Attacks
Abstract. A recent branch of cryptography focuses on the physical constraints that a real-life cryptographic device must face, and attempts to exploit these constraints (running ti...
François Koeune, François-Xavier Sta...
VLSISP
2010
148views more  VLSISP 2010»
13 years 6 months ago
Energy-efficient Hardware Architecture and VLSI Implementation of a Polyphase Channelizer with Applications to Subband Adaptive
Abstract Polyphase channelizer is an important component of subband adaptive filtering systems. This paper presents an energy-efficient hardware architecture and VLSI implementatio...
Yongtao Wang, Hamid Mahmoodi, Lih-Yih Chiou, Hunso...
FSE
2005
Springer
118views Cryptology» more  FSE 2005»
14 years 1 months ago
A Side-Channel Analysis Resistant Description of the AES S-Box
So far, efficient algorithmic countermeasures to secure the AES algorithm against (first-order) differential side-channel attacks have been very expensive to implement. In this a...
Elisabeth Oswald, Stefan Mangard, Norbert Pramstal...