Sciweavers

2257 search results - page 255 / 452
» Secure program partitioning
Sort
View
CVPR
2010
IEEE
14 years 6 months ago
Naming People from Dialog: Temporal Grouping and Weak Supervision
We address the character identification problem in movies and television videos: assigning names to faces on the screen. Most prior work on person recognition in video assumes s...
Timothee Cour, Benjamin Sapp, Akash Nagle, Ben Tas...
CASES
2006
ACM
14 years 4 months ago
Integrated scratchpad memory optimization and task scheduling for MPSoC architectures
Multiprocessor system-on-chip (MPSoC) is an integrated circuit containing multiple instruction-set processors on a single chip that implements most of the functionality of a compl...
Vivy Suhendra, Chandrashekar Raghavan, Tulika Mitr...
RTSS
2003
IEEE
14 years 3 months ago
Data Caches in Multitasking Hard Real-Time Systems
Data caches are essential in modern processors, bridging the widening gap between main memory and processor speeds. However, they yield very complex performance models, which make...
Xavier Vera, Björn Lisper, Jingling Xue
IEEEPACT
2002
IEEE
14 years 3 months ago
Transparent Threads: Resource Sharing in SMT Processors for High Single-Thread Performance
Simultaneous Multithreading (SMT) processors achieve high processor throughput at the expense of single-thread performance. This paper investigates resource allocation policies fo...
Gautham K. Dorai, Donald Yeung
ASPDAC
2001
ACM
130views Hardware» more  ASPDAC 2001»
14 years 2 months ago
Area/delay estimation for digital signal processor cores
Hardware/software partitioning is one of the key processes in a hardware/software cosynthesis system for digital signal processor cores. In hardware/software partitioning, area and...
Yuichiro Miyaoka, Yoshiharu Kataoka, Nozomu Togawa...