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ARC
2007
Springer
150views Hardware» more  ARC 2007»
14 years 1 months ago
MT-ADRES: Multithreading on Coarse-Grained Reconfigurable Architecture
The coarse-grained reconfigurable architecture ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) and its compiler offer high instruction-level parallelism (ILP)...
Kehuai Wu, Andreas Kanstein, Jan Madsen, Mladen Be...
ELPUB
2007
ACM
14 years 1 months ago
The Digital Scholar's Workbench
In this paper I present the reasoning behind the development of a new end-to-end publishing system for academic writers. The story starts with investigating digital preservation o...
Ian Barnes
GLVLSI
2007
IEEE
162views VLSI» more  GLVLSI 2007»
14 years 1 months ago
Utilizing custom registers in application-specific instruction set processors for register spills elimination
Application-specific instruction set processor (ASIP) has become an important design choice for embedded systems. It can achieve both high flexibility offered by the base processo...
Hai Lin, Yunsi Fei
ICLP
2007
Springer
14 years 1 months ago
User-Definable Resource Bounds Analysis for Logic Programs
We present a static analysis that infers both upper and lower bounds on the usage that a logic program makes of a set of user-definable resources. The inferred bounds will in gener...
Jorge Navas, Edison Mera, Pedro López-Garc&...
CLUSTER
2004
IEEE
14 years 1 months ago
JuxtaView - a tool for interactive visualization of large imagery on scalable tiled displays
JuxtaView is a cluster-based application for viewing ultra-high-resolution images on scalable tiled displays. We present in JuxtaView, a new parallel computing and distributed mem...
Naveen K. Krishnaprasad, Venkatram Vishwanath, Sha...