605 search results - page 15 / 121 » Self-Timed Architecture of a Reduced Instruction Set Compute... |
LCTRTS
2010
Springer
14 years 2 months ago
2010
Springer
A large number of embedded systems include 8-bit microcontrollers for their energy efficiency and low cost. Multi-bank memory architecture is commonly applied in 8-bit microcontr...
PLDI
2012
ACM
11 years 9 months ago
2012
ACM
Software-based fault isolation (SFI), as used in Google’s Native Client (NaCl), relies upon a conceptually simple machine-code analysis to enforce a security policy. But for com...
ASPLOS
2009
ACM
14 years 8 months ago
2009
ACM
Parallel bit stream algorithms exploit the SWAR (SIMD within a register) capabilities of commodity processors in high-performance text processing applications such as UTF8 to UTF-...
POPL
1994
ACM
13 years 11 months ago
1994
ACM
Modern computer architectures increasingly depend on mechanisms that estimate future control flow decisions to increase performance. Mechanisms such as speculative execution and p...
IPPS
1999
IEEE
13 years 11 months ago
1999
IEEE
VLIW machines possibly provide the most direct way to exploit instruction level parallelism; however, they cannot be used to emulate current general-purpose instruction set archit...