Equality logic with or without uninterpreted functions is used for proving the equivalence or refinement between systems (hardware verification, compiler’s translation, etc). C...
This paper shows how XML can be used for static and dynamic analysis of architectures. Our analysis is based on the distinction between symbolic and semantic models of architectur...
Frank S. de Boer, Marcello M. Bonsangue, Joost Jac...
Abstract. In this paper, we report on the development of a methodology for the evolution of software towards new architectures. In our approach, we represent source code as graphs....
Rui Correia, Carlos M. P. Matos, Reiko Heckel, Moh...
We present a declarative debugger for lazy functional logic programs with polymorphic type discipline. Whenever a computed answer is considered wrong by the user (error symptom), ...
In this paper, we describe a first-order linear time temporal logic (LTL) model checker based on multiway decision graphs (MDG). We developed a first-order temporal language, LMDG ...