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FMCAD
2004
Springer
14 years 2 months ago
Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs
Late changes in silicon design (ECO) is a common although undesired practice. The need for ECO exists even in high-level design flows since bugs may occur in the specifications, ...
Laurent Arditi, Gérard Berry, Michael Kishi...
IWMM
2009
Springer
152views Hardware» more  IWMM 2009»
14 years 3 months ago
A new approach to parallelising tracing algorithms
Tracing algorithms visit reachable nodes in a graph and are central to activities such as garbage collection, marshalling etc. Traditional sequential algorithms use a worklist, re...
Cosmin E. Oancea, Alan Mycroft, Stephen M. Watt
ICS
1999
Tsinghua U.
14 years 1 months ago
Software trace cache
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
Alex Ramírez, Josep-Lluis Larriba-Pey, Carl...
ICDCS
2007
IEEE
14 years 3 months ago
STEP: Sequentiality and Thrashing Detection Based Prefetching to Improve Performance of Networked Storage Servers
State-of-the-art networked storage servers are equipped with increasingly powerful computing capability and large DRAM memory as storage caches. However, their contribution to the...
Shuang Liang, Song Jiang, Xiaodong Zhang
SC
1990
ACM
14 years 1 months ago
Tracing application program execution on the Cray X-MP and Cray 2
Important insights into program operation can be gained by observing dynamic execution behavior. Unfortunately, many high-performance machines provide execution profile summaries ...
Allen D. Malony, John L. Larson, Daniel A. Reed