193 search results - page 22 / 39 » Sequentialization of Parallel Logic Programs with Mode Analy... |
117
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ICSE
2007
IEEE-ACM
16 years 2 months ago
2007
IEEE-ACM
Model checkers search the space of possible program behaviors to detect errors and to demonstrate their absence. Despite major advances in reduction and optimization techniques, s...
122
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ICS
1999
Tsinghua U.
15 years 6 months ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
119
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IEEEPACT
2003
IEEE
15 years 7 months ago
2003
IEEE
This paper presents a framework for analyzing the performance of multithreaded programs using a model called a constraint graph. We review previous constraint graph definitions fo...
115
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CASES
2006
ACM
15 years 8 months ago
2006
ACM
This paper considers the efficient parallel implementation of control constructs and expressions written in a common software programming language and synthesised to FPGA platform...
123
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APLAS
2006
ACM
15 years 8 months ago
2006
ACM
This document contains the Isabelle/HOL sources underlying our paper A bytecode logic for JML and types [2], updated to Isabelle 2008. We present a program logic for a subset of s...