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ISPASS
2007
IEEE
15 years 8 months ago
DRAM-Level Prefetching for Fully-Buffered DIMM: Design, Performance and Power Saving
We have studied DRAM-level prefetching for the fully buffered DIMM (FB-DIMM) designed for multi-core processors. FB-DIMM has a unique two-level interconnect structure, with FB-DIM...
Jiang Lin, Hongzhong Zheng, Zhichun Zhu, Zhao Zhan...
138
Voted
MM
2003
ACM
161views Multimedia» more  MM 2003»
15 years 7 months ago
Integrated power management for video streaming to mobile handheld devices
Optimizing user experience for streaming video applications on handheld devices is a significant research challenge. In this paper, we propose an integrated power management appr...
Shivajit Mohapatra, Radu Cornea, Nikil D. Dutt, Al...
BMCBI
2004
169views more  BMCBI 2004»
15 years 2 months ago
A power law global error model for the identification of differentially expressed genes in microarray data
Background: High-density oligonucleotide microarray technology enables the discovery of genes that are transcriptionally modulated in different biological samples due to physiolog...
Norman Pavelka, Mattia Pelizzola, Caterina Vizzard...
103
Voted
DLOG
2007
15 years 4 months ago
Expressing DL-Lite Ontologies with Controlled English
In this paper we deal with the problem of providing natural language front-ends to databases upon which an ontology layer has been added. Specifically, we are interested in expres...
Raffaella Bernardi, Diego Calvanese, Camilo Thorne
EAAI
2008
128views more  EAAI 2008»
15 years 2 months ago
Dual heuristic programming based nonlinear optimal control for a synchronous generator
This paper presents the design of an infinite horizon nonlinear optimal neurocontroller that replaces the conventional automatic voltage regulator and the turbine governor (CONVC)...
Jung-Wook Park, Ronald G. Harley, Ganesh K. Venaya...