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PLDI
2006
ACM
14 years 2 months ago
Optimizing memory transactions
Atomic blocks allow programmers to delimit sections of code as ‘atomic’, leaving the language’s implementation to enforce atomicity. Existing work has shown how to implement...
Timothy L. Harris, Mark Plesko, Avraham Shinnar, D...
FPGA
2010
ACM
181views FPGA» more  FPGA 2010»
14 years 8 days ago
Efficient multi-ported memories for FPGAs
Multi-ported memories are challenging to implement with FPGAs since the provided block RAMs typically have only two ports. We present a thorough exploration of the design space of...
Charles Eric LaForest, J. Gregory Steffan
ANSS
2007
IEEE
14 years 3 months ago
Validation of a Load Shared Integrated Network with Heterogeneous Services
As wireless networks have become more complex with packet services and sophisticated modulation techniques, validation using multidimensional Markov Chain models has become increa...
S. J. Lincke
ICPP
1993
IEEE
14 years 1 months ago
Scalability Study of the KSR-1
Scalability of parallel architectures is an interesting area of current research. Shared memory parallel programming is attractive stemming from its relative ease in transitioning...
Umakishore Ramachandran, Gautam Shah, Ravi Kumar, ...
IEEEPACT
2008
IEEE
14 years 3 months ago
Adaptive insertion policies for managing shared caches
Chip Multiprocessors (CMPs) allow different applications to concurrently execute on a single chip. When applications with differing demands for memory compete for a shared cache, ...
Aamer Jaleel, William Hasenplaugh, Moinuddin K. Qu...